Category Archives: School

Finally wrapping up my PhD!

Posted on 2024-07-09 by pappp

The largest reason I’ve been starving every one of my other interests, like posting here, for the last several years is finally wrapping up, and looks like it will get me a PhD in Computer Science.

Wednesday July 24, 2024. 1:00PM. 101 Davis Marksbury Building.

Title: Post-Capture Synthesis of Images Using Manipulable Integration Functions
Abstract:
Traditional photographic practice, as dictated by the properties of photochemical emulsion film, mechanical apparatus, and human operators, largely treats the sensitivity (gain) and integration interval as coarsely parameterized constants for the entire scene, set no later than the time of exposure. This frame-at-a-time capture and processing model permeates digital cameras and computer image processing.

Emerging imaging technologies, such as time domain continuous imaging (TDCI), quanta image sensors (QIS), event cameras, and conventional sensors augmented with computational processing and control, provide opportunities to break out of the frame-oriented paradigm and capture a stream of data describing changes to scene appearance over the capture interval with high temporal precision. Captured scene data can then be computationally post-processed to render images with user control over the time interval being sampled and the gain of integration, not just for each image rendered but for every site in each rendered image, allowing the user to ideally expose each portion of the scene. For example, in a scene that contains a mixture of moving elements some of which are more brightly lit, it becomes possible to render dark and light portions with different gains and potentially overlapping intervals, such that both have good contrast, neither one suffers motion blur, and little to no artifacting occurs at the interfaces.

This thesis represents a preliminary exploration of the properties, application, and tooling required to capture TDCI streams and render images from them in a paradigm that supports functional post-capture manipulation of time and gain.

So excited to be rid of this thing. It’s a genuinely nifty idea, and sort-of the idea I started out with, but I’m very tired of looking at it.

If any internet friends want to come watch me talk shit about it for ~1 hour, you’re welcome.
I’ll post my thesis and slides after it’s done.

Posted in Announcements, Computers, General, School | 1 Comment

SC’23 Notes

Posted on 2023-11-21 by pappp
The entryway to the SC23 conference at the Colorado Convention Center

I got talked into going to SC again this year, as I have almost every year since 2009.
It’s not really my area of focus, but it’s always interesting.

UK's booth at SC'23, featuring the KES PBP demo.


UK’s presence featured a mixture of IT/CCS types and researchers, the research end of the booth was mostly focused on ongoing Parallel Bit Pattern Computing work, featuring a new demo/visualization thing that I built much of the hardware and some of the software for in the 3 weeks before we left for the conference (the rest came from Hank modelling some printable parts, pulling the compute engine from an older demo he wrote, and building some adapter code). It was more exhausting than the conference itself, but a really fun prototyping/micomanufacturing flex. Fancy 3D printed parts, 2020 extrusion, some laser cut bits, piles of addressable LEDs, a bit of embedded electronics. There is also a partially-functional prototype backplane to link 4 EBAZ425 FPGA boards through an Aggregate Function Network as a PBP substrate that …I designed. There’s a lot of not-my-job work I did on display; I should probably start throwing more of a fit about that.

Some notes about the stuff we were showing and interesting(?) industry observations below.

Continue reading →
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Porting Labs from ARM Compiler V5 to V6

Posted on 2022-12-20 by pappp

I spent the last two afternoons procrastinating from other work doing a deferred maintenance project, porting the labs for UK’s CPE287 Introduction to Embedded Systems from the “V5” armcc to the “V6” armclang compiler, since the most recent releases of Keil (the IDE we use in the class) have dropped support for the older compiler, and all our materials were written against V5. It has been a somewhat interesting porting exercise for a “same vendor, same platform” situation.

We have some slightly unusual circumstances: First, because the class starts in writing pure assembly, proceeds through manual bit manipulation in C, and eventually starts to write high-level software driver model code, we hit all the styles and interfaces. Secondly, we have an inexpensive textbook and supporting materials we rather like, but all the examples use the old style assembly syntax, which differs significantly from the more modern GCC/LLVM style, and for pedagogical consistency reasons we’d like to write our code in that style.

ARM/Keil have produced a document AN298 – Migrate ARM Compiler 5 to ARM Compiler 6 which covers most of the important details, but it was still a bit of a skilled process.

Some notes:

  • For the time being, Keil with the V6 toolchain includes the older armasm binary, so separate pure-assembly .s sources written in the old syntax can still be ingested, you only have to port inline assembly.
  • Keil’s debugger doesn’t appear to be able to keep source lines of inline assembly and the disassembly view synchronized for GCC-style inlined assembly the way it could with armcc. Unfortunate, and a bit klutzy for setting breakpoints, but not a deal-breaker.
  • armclang defines __ARMCC_VERSION as 6something so various pieces of existing code have pre-processor directives that will decide to use the armcc style inline assembly instead of the gcc style ones. Particularly irritating, TI’s first party TivaWare library has this problem in both cpu.c and sysctl.c, so I had to make a hacked version with the #ifdef s swirled around appropriately. The code in TivaWare intended for IAR ewarm is suitable for armclang … as long as you remove some spare ewarm-specific pragmas embedded here and there for suppressing return value warnings; I ended up putting -Wno-return-type in the extended compiler options for projects depending on those files.
  • armclang is much more aggressive about optimization by default than armcc was. In particular, you could get away without marking variables used in busy wait loops or ISRs volatile in armcc, and armclang will happily optimize them out if you forget.
  • armclang is more vocal about implicit type conversion than armcc, especially where it might affect signedness. This is triggered a lot by the REGISTER_NAME &= ~0xMASK bit-specific addressing idiom. I sprinkled in lots of UL suffixes on literals to avoid the issue.

Long term we might try to get off of Keil, though my experiences with CodeComposerStudio have been sufficiently frustrating that I’m in no hurry to move to it for the TI TivaC boards we’ve been using, and while I like ST’s Cube environment, it would both be a major change of materials and a potential supply-chain nightmare (when is the last time you saw a legitimate major electronics vendor with STM32 parts in a stock status other than “Expected Date: Eventually”?)

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PhD Qualified

Posted on 2020-11-28 by pappp

As of about a week ago, I’ve apparently passed my Qualifying Exam research proposal, which was my last hurdle to PhD candidacy.

My PhD project is on TDCI (Time Domain Continuous Imaging) – an alternative imaging technology that folks in the research group I’ve been working with for almost 15 years now have been building, with my help, for the last 6 years. The basic premise is that digital sensors are not, in fact, re-settable film, and we should leverage them accordingly. By rough concept, TDCI capture is like recording the waveform of incident light from each sensel of the sensor, then computationally exposing that data into an image after the fact, to maximize information capture and so that the sensor and shutter behavior can be tweaked after the fact.

The specific deliverables I carved out as a PhD project were building a high-quality capture device (By hacking a mirrorless body), adding non-uniform exposure behavior to TDCI integration (specifying functions and regions for integration), and building a decent user-facing tool for rendering TDCI images from TDCI captures (A DSL + a GUI to specify common options) – because these were some fun tool-building to carve out of the larger research needs.

The deck with notes that I used are uploaded here. Some of the notes are …not entirely proper… because they were second-screen things for my consumption.

It’s a slightly odd situation because I’ve been working things that feed into this project for 6 years (and 11 papers), and technically started UK’s CS PhD program in 2012 (admittedly, I just signed up so I could keep taking classes while I finished my MS work, finishing the degree is a little “eh, might as well”), but it looks like I’m getting away with it. Also odd, thanks to the COVID-19 situation, it was done via zoom, in pajama pants.

The only points in the presentation I did things I was immediately not happy about were:

  • I was asked about doing spatially continuous models, and spent some time babbling about sensor spatial quantization and fill factors instead of just saying “diffraction” and shutting it down.
  • I didn’t include anything for the “TDCI makes exposure time and shutter angle independent” concepts in the slides, and it came up twice.


Plus I have the concern that Rafi (my Co-Chair) soft-balled the hell out of me and pitched a bunch of questions I’m reasonably sure he knew I had prepared spiels for from my materials. That’s not his usual behavior by reputation or observation, and it makes me slightly paranoid.

Now to finish out the deliverables and actually become Dr.

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I ran into a delightful irony trying to help a student get set up for the embedded systems lab I’m running this semester: Neither Keil MDK ARM (a first-class ARM development environment) nor the Stellaris ICDI Drivers (TI’s programming/debug interface … Continue reading →

Posted on 2020-09-09 by pappp | 2 Comments

College Advice from a University Instructor

Posted on 2020-05-11 by pappp

I’ve seen a spate of articles pop up recently discouraging people from going to college in fall 2020 because of the COVID-19 pandemic situation. They’re mostly from self-mythologizing startup douches and/or carpetbaggers trying to sell alternative education products, so there isn’t much of value in them and I won’t be linking.

However, talking about them has me refining and recording the advice I give to prospective college students.
So in that interest, a list of my usual advice. Which is very, very explicitly prefaced with the usual “Opinions expressed are solely my own and do not express the views or opinions of my employer” disclaimer.

Continue reading →
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SC’19

Posted on 2019-11-23 by pappp

Even though I haven’t done any work in that area in years, I got pulled into the Supercomputing conference again this year.  Can’t complain, it’s always fun.  UK’s combined booth looked good this year

Far corner is a little updated TinyTitan style Raspberry Pi cluster with a interactive CFD demo running on it that the CCS folks have been playing with, that thing in the leading corner is a cute flip-dot “quantum computer” model we built as a front-end for a 16-bit instance of Hank’s parallel bit-pattern computing system that can do quantum algorithms efficiently on a conventional platform – set in the corner of the booth like

You don't need quantum physics to perform quantum compution. Change my mind.

He did surprisingly well with this approach.

The exhibit floor was even more dominated by cooling tech this year. Exciting finds are the coming of very open (Open Compute Project, Coreboot + Open Network Linux) white-box 100GBE switches at reasonable prices, Fujitsu’s A64fx ARM with SVE and obscene memory bandwidth parts actually landing in systems, and (just because it tickled me) pre-wired fully populated Clos topology 100G cable harnesses.  The other dominant species was AI woo; my body is ready for AI Winter 3.0.

Google photos album of my annotated show floor photos is here.

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Masters in Electrical Engineering (Finally) Collected

Posted on 2019-05-16 by pappp

That MSEE that I was going to finish in 2011, 2013, and 2015? I blew a couple months in the last year to get all the ducks in a row and actually collected it before the credits expired.  Huge thanks to Dr. Aaron Cramer, the current DGS for UK’s ECE department who went to great lengths to deal with the bureaucratic issues my lackadaisical attitude about credentials created.

Thesis is “A Compiler Target Model for Line Associative Registers” document and defense slides with notes linked.

The LARs design is fundamentally interesting, but the compilation work the MS is based on is not my favorite work I’ve done.  The core initial assumption (that LAR allocation and register allocation were more-or-less the same problem) turned out to be very, very wrong, and the implications of that wrong assumption turned out to be far reaching, turning a 2-year MS into a decade-long ramble. It’s not as depressing as I thought it would be when I tried to finish in 2015 (and was blocked by bureaucratic fuckery) because I did eventually determine that LARs aren’t subject to the “you can’t statically schedule around dynamic memory behavior” thing that doomed VLIWs, and in fact LAR allocation can be done greedily in ways that register allocation cannot.

The thesis is more or less assembled from three false starts plus the final effort; my initial research start with the wrong assumptions, my “oh, we’re wrong, but it’s OK” pass, and my “oh shit, we’re screwed, this won’t work and there his historical evidence to show it” pass, plus the final “I’ve figured out how this is tractable and possibly even desirable, but I’m out of time and fucks, so here’s the rough solution” pass.

I formatted the thesis in LaTeX (of course), using the ukthesis.cls class I found on the UK Math site that Eric Stokes, a former student, made a decade and change ago since UK is too chickenshit to provide a valid one of their own.  I did have to hack it a little bit, turn off some features, tweak the front matter, etc. to make it acceptable to the graduate school, and update a few things (eg. adjusted to use biber for references).  There are a few things in the document that should be in the class, and things in the class that should be in the document, but the easy-to-fix stuff is fixed.  Minimal example pulled from the accepted version with makefile and such here to save future students the extra annoyance.

The presentation is in beamer using the Owl theme, which was a delightful recent discovery – someone has made a beamer color scheme with a dark background and colors that actually look good on a projector. I (much to one of my committee member’s disappointment) went with the bullets-to-keep-me-on-track-while-I-talk style slides instead of my usual “amusing semi-relevant pictures to key off of” scheme.

It’s nice to be done and only have one, significantly less depressing, long-term academic project people are grumpy about my progress on.

Posted in Announcements, Computers, General, School | Tagged | 1 Comment

Ebay DB25 Arduino Nano grbl Adapters

Posted on 2017-05-09 by pappp

A second consecutive CNC post, because I haven’t had time to write up long-form posts for months, and something requiring documentation came up today.

While I’m still quite happy with LinuxCNC (especially since I discovered NativeCAM), my adviser bought himself a GRBL-DB25 adapter board for his 3040T mentioned in my previous post. He has been unsurprisingly unsatisfied with the performance of the terrible old SFF P4 box he has been using to drive it with LinuxCNC, and we’ve (read: I’ve) become reasonably comfortable with grbl due to the several shitty diode laser cutters that have recently proliferated around here (One or more of the involved parties will be posting about those shortly). As I’ve noted elsewhere, grbl is not my first choice, but has reached baseline required functionality in versions >1.1 and is unarguably convenient.

In particular, he went with one of the Arduino Nano based boards floating around ebay with titles like USB 3-Axis CNC TB6560 Driver Board Controller Converter GRBL Arduino Nano DB25, which are unfortunately both undocumented and (as it turns out) unsuitable. He asked me to help set it up, and this post serves to document and warn based on my findings.

It seems like it should be a great solution, but it will not work with the typical black control boxes that come with many little aluminum CNC machines or most other common 3 or 4 axis breakout boards. It has the (dead) URL www.getlofi.com/grbl-to-3axis on the silkscreen, and while getlofi.com does appear to be a valid page run by some hackers mostly into circuit bending, I couldn’t shake any mention, much less relevant documentation out of the page. What I did find with a continuity tester and some patience is the following unfortunate arrangement:

The problem is that the designer decided to tie DB25 pins 2,6,and 14 together to nano pin 11 (D8) with traces on the adapter. This renders it completely unusable with the 2-7 StepX/DirX/StepY/DirY/StepZ/DirZ pinout the vast majority of boards use, as StepX and StepZ are wired together. If I’m inferring which shitty blue TB6560 3-axis board it’s designed to work with correctly, 2, 6, and 14 are intended to be per-axis stepper enable pins, but that is not a particularly common configuration.

For contrast, I picked up one of the Arduino GRBL to DB25 CNC Shield Kits available from “Ron” on Tindie to throw in my parts bin for testing. It’s actually documented, supports the pin-out most parallel control boards I’ve encountered use (with the default grbl pinout no less), and has each individual pin broken out like a sane designer, so it should support any reasonable configuration. I tried my tindie board with the machine that was supposed to get the fail board, and it seems to work fine, so I’m going to encourage picking up one of those instead (unless we get ambitious and just cut our own DB25-Nano board).

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Install Viavdo 2016.2 on ArchLinux (x86_64)

Posted on 2016-09-08 by pappp

As of the date of this post, Xilinx Vivado 2016.2 works fine on Arch with minimal coaxing. Said coaxing is documented here in case it will be useful for others.

1. Install ncurses5-compat-libs from AUR, or the installer will hang during a later step. It appears to be required at runtime as well.

2. Mark the installer executable, eg. chmod +x Xilinx_Vivado_SDK_2016.2_0605_1_Lin64.bin, and run it with the confirm flag, ./Xilinx_Vivado_SDK_2016.2_0605_1_Lin64.bin --confirm

3. Hit Y at the “unpack” prompt, then go into the directory it creates at /tmp/selfgz[RANDOMSTRING], and edit xsetup to replace `uname -i` with `uname -m`, which is what they should have used in the first place.

4. Pre-create and permission the install path, a reasonable choice is the default /opt/Xilinx, which needs to be writable by the user doing the install (eg. chgrp users /opt/Xilinx, chmod g+w /opt/Xilinx)

5. Return to the terminal and hit Y to continue until the GUI installer runs.

6. Follow the GUI installer instructions, Feed the prompt your Xilinx credentials, Select Vivado HL WebPACK, etc.

7. The activation prompt at the end of the installation procedure is misleading, in the 2016.x versions if you simply quit without activating, the install automatically goes into WebPACK mode. If you don’t have/need any of the non-WebPACK features, activating the 30-day free trial of the nonfree version is asking for a headache when it expires.

8. It works. (and as a bonus convenience over the old toolchain, at least the Digilent Basys 3 boards use a normal FTDI usb-serial as their onboard programmer, so you don’t have to fight with drivers to program boards, that just works too.)

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