Category Archives: Computers

HAK Wired

To follow up the previous post, the group finished wiring HAK Friday afternoon… and into the evening. About 480 runs of Cat5 for both the FNN and a separate network for monitoring and provisioning. It’s an interesting looking network; because of the way it was designed, it is unusually symmetrical for an FNN, so the core has trunks for the rack-crossings on each network, and is therefore rather neat:

Unfortunately, this does mean that all the cables in each wing are passing through the small slot in the center… which looks about like you would expect from the back:

It should produce some interesting results.

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HAK Wiring


I’ve spent a good fraction of the last several days helping with the preparation and assembly for a cluster the research group is building from 96(+4) old Athlon XP nodes to conduct network research on. The machine is named HAK for “Half-powered Athlon cluster in Kentucky, referring to the fact that every pair of nodes is sharing a power supply (notice the flipped cases). This design is both to save power (switching power supplies are most efficient when heavily loaded), and save power supplies, since that is the part that has had the highest failure rate in the pool of machines used to build it. After a couple passes of repairing nodes, homogenizing network cards and the like, we got to the photogenic part today: attaching the network. In the picture, there is a standard tree topology 100Megabit Ethernet network across all the nodes (the yellow and pink wiring), which will be used for administration and provisioning, and began sticking a full FNN (the bundles of red cable snaking around… those are the first 3 sets of 32, the other 9 are the colored bundles on the floor). That machine is set up to have it’s network swapped out with a FFNN (Fractional Flat Neighborhood Network) and SFNN (Sparse Flat Neighborhood network), but requires this initial fully populated Universal FNN as a baseline for comparison.

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Nokia Plan B

To follow up the last post, this is pretty cool – a shareholder driven concept for a slimmer, more directed Nokia that remains in control of their core platform. I’ve read through and am in near complete agreement with their plan, and it sounds a lot better than “Become the next Kin.” I don’t directly own Nokia stock (apparently I do indirectly hold some through mutual funds), but I would be seriously considering it if I did, and I hope they succeed. I’d also like to add a proper citation for the previous claim that Microsoft’s mobile partnerships are a string of painful failures.
In more pleasant news, some users have hacked together another new patch set for the Diablo/OS2008 maemo release the n810 runs, and now that I’ve got a new battery and rid myself of the BME bug I hope to play with them. I’m thinking I’ll be a little more cavalier with my use of alternate OSes and software on my n810 now that it is getting problematically obscelescent.

EDIT: It was a hoax.. The issues are real though.

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Nokia + Microsoft = Fail.

This morning Nokia announced a partnership with Microsoft, and a transition to Windows Phone 7 for their high end products. Why they were incapable of learning from Microsofts many successes in the mobile space, and quality mutually beneficial relationships with partners isn’t clear. The fact that Stephen Elop (current Nokia CEO) came from Microsoft last September could be related. The reason I care is that Meego (successor to maemo) was the only mobile platform I was in any way optimistic about fulfilling the promise of “Computer in your pocket,” and it just became a second-class citizen with a limited lifespan.
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The Raskins

I always enjoy reading things by the Raskins, both Jef, and his son Aza.  The latest article making the rounds is The Mac Inventor’s Gift Before Dying: An Immortal Design Lesson for His Son, which is a charming story about the mindset that makes them both so interesting.  There is an ever present bit of pretentiousness and excess verbosity to both of their writing, but between their overt self-awareness of the behavior, and my own writing having many of the same properties, it rarely bothers me.
The really interesting thing in stories about Jef, and his own writing is hearing what the prime mover for the direction of computer interfaces for the last thirty thinks went wrong, especially with regard to things he was directly responsible for – it helps remind me that the currently dominant interface paradigms are the result of a long evolutionary process with lots of missteps, not some sort of manifest destiny.

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Beware WordPress Revision Behavior

The editing/cleaning/etc. I’ve been doing to the new blog has caused lots of inconsequential minor revisions to content… which would be fine except that, by default, recent versions of WP generate a new PostID (and associated database cruft) EVERY TIME YOU MAKE A REVISION, resulting in about 350 bogus PostIDs between my last two posts – about 200 of them from leaving the editor up and autosaving for a couple hours. The interwebs are full of notes about adding define('WP_POST_REVISIONS', false); to wp-config.php to turn revision saving off, and there is a handy delete-revision plugin to purge any that got by without having to bust out SQL tools, but what a dumb behavior.

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Notes on Migrating Flatpress to WordPress

I’m going to post up some notes on the process of migrating my content from the Flatpress (wordpress-like flat-file backed CMS) instance at my old blog to a WordPress (the dominant CMS for blogs, MySQL backed) instance here at pappp.net.  The short version? It is seriously aggravating. Long block of text follows.
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Blog Move

This blog is in the process of moving in from it’s previous location at http://www.engr.uky.edu/~pseber0/ to it’s new home at pappp.net on bluehost. This current page will no doubt be repeatedly created and destroyed in the process, as I try to explain to the terrible migration tool about internal linking, resources, categories, and a variety of other things it is doing it’s best to lose or mangle. Things should be up and running in a couple of days, when the links will be updated, and the relocation notice will go up at the old location. This post also has a full set of categories, to force updates.

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IPv4 Depletion

Oh look, the allocation to IPNIC today set off the IPv4 endgame provisions! Now to watch another problem unfold because we (as a culture) spent the last several decades focusing on short term profits instead of investing in infrastructure. We may have lagging communications infrastructure, a desperately eroded manufacturing base, and a whole heap of other stupid (not to mention our ludicrously inefficient healthcare stemming from the same “Why pay now when I can pay more later” attitude) , but at least we aren’t socialists, right?…Goddamnitsomuch.
Next up: Peak Oil (unless it already happened.. oh right, it probably did).

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Pionier Button Hacking: Step 2

It took over a year for me to get back to it, but I finally sat down and made some progress on hacking the Buttons Pionier was giving away at SC09.

When I last posted about it, I had drawn out all the USB identification information, as well as disassembled one, identified all the hardware components, and tracked down data sheets for the important bits.

Now that I have a Bus Pirate, I decided to dump the 24c64 EEPROM. A 24c64-type EEPROM speaks standard I2C, with the addition of three dedicated address pins (for banking chips), and a hardware write protect pin.

My first attempt was a little troublesome, because attaching the chip in-place was (as is often the case) powering the whole board, leaving two I2C bus masters, and confusing the situation.

The following is basically a reference for communicating with 24c32/64 EEPROMs.

To remedy the problem, I simply desoldered the 24c64 from one of the buttons, soldered pins 1-4 (one full side) to a bit of wire, so I could ground GND, A2, A1 and A0 with a single clip, and attached the bus pirate leads to the floating chip (Yes, SOIC8 packages are rather small):

24c64dump_sm.jpg

To be specific the connections are GND to pins 1-4 (Gnd, A2, A1, A0) 3.3V to Vcc (8) and WP(7), CLK to SCL (6), and MOSI to SDA (5) like so:

24c6pins_sm.png

To write the ROM, the WP pin would need to be grounded instead of powered, but preventing writes is a good safety measure when exploring.

Software-side, I ended up following the communication instructions in the Bookly 24c64 datasheet, because I found them asier to interpret, but the datasheets from Atmel or any other manufacturers that make a compatible part will do as well. Start with the usual bus pirate setup of ‘m’ for menu, ‘4′ for I2C, Chose a clock (I used 100kHz for fear of interference from the long-for-I2c leads), ‘P’ to turn on pull-up resistors, and ‘W’ to turn on the power supplies.

Then, to read out a 24C64, you feed it (this is a commented log of the terminal session)

I2C>[0xA0 -- Start, Send 1010, the Values on the A2-A0 pins (000 if grounded), Followed by 0 write for and 1 for read -- dummy write to set address pointer
I2C START BIT
WRITE: 0xA0 ACK
I2C>0x00 -- Send the start address to the chip, the 24c64 ignores first three bits. 0x0000 to start at the beginning of the ROM.
WRITE: 0x00 ACK
I2C>0x00
WRITE: 0x00 ACK
I2C>[0xA1 -- Starts, then random read (same as first byte of dummy write, with R/W high instead of low)
I2C START BIT
WRITE: 0xA1 ACK
I2C>r:255 -- Sequential read out the whole ROM (Overflows most terminal's history, I pulled 256 or 512 at a time.)
READ: 0x5A  ACK 0xA5  ACK...

I dumped it twice to cross-check that I didn’t make any dumb mistakes the first time, then massaged the dump with some regexes to get rid of the communication details and extract a pure hex dump. Only the first 4608 bytes of the ROM are written, so there is even room to tamper, if I can figure out the encoding. Note that the posted string is NOT S-records or Intel HEX, but raw ASCII-encoded two-characters-per-byte hex. In order to get it into an 8051 disassembler for further analysis, I will either need to figure out how to coax the Bus Pirate to generate a formatted dump, or write a script to segment and prefix the existing string, but neither has happened yet.

Giving analysis a first pass, I looked for pieces of the string it prints when activated as ASCII and raw USB HID Scancodes, but didn’t find them… which either means there is a problem with the dump (byte order?), or some clever and inconvenient encoding was used. I’m not terribly familiar with 8051s and their associated tools, so that will be the rather large next step. If nothing turns up in analyzing the dump, I may have to sniff the bus while the board is in operation to see if there is some funky data layout obfuscation.

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