Intel to disable TSX by default on more CPUs with new microcode

Source: Hacker News

Article note: ...Wow, that's a hard abandon. Transactional Memory has always been supremely difficult to get right, so it's not super shocking, but it's still a wild ride. They retroactively microcode-removed the "earlier buggy" implementation from most Haswell through Broadwell parts in 2014, they stopped including it in new parts from Comet Lake (2019) on, and now they're removing it for a bunch of products from the Skylake through Coffee Lake era in between with microcode updates... which is basically going back and erasing it.
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