HDL Testbenches

After three classes (EE281, EE480, EE585) where I should have been taught how to write real, procedural testbenches for my digital circuit simulation instead of clicking in inputs on ISE’s (ISE is the subject of much swearing and hatred) waveform editor, there was a nominal effort to demonstrate it in EE685, and between that example and the Verilog book I bought for my own edification some time ago (It’s an OK book: I’m yet to find a HDL text I really like), I finally managed to get it down. This is important for three reasons: First: NO MORE CLICKING! I can write little procedural blocks to generate counting-order covering inputs, or other arbitrary stimulus. Second: Automatic Testing! For simple modules, I can simply write two logically equivalent but stylistically different versions, and, barring any design-level fuckups, determine that they both work by telling the simulator to compare the two version’s behavior and alert me if they differ. Third (and most signifigantly) it allows me to do my check/test/verify my modules without dealing with ISE. There are a number of free Verilog tools, most significantly Icarus Verilog, a Free (GPL) synthesis/simulation suite which seems to be well liked (and builds and installs easily on my machine), which allow me to have a whole toolchain without the hassle of maintaining my own ISE installation, or putting up with the glacially slow (despite being very, very powerful; bad configuration) lab machines for longer than is required to generate a test run to turn in for class.
Icarus looks to be an interesting challenge; it definitely doesn’t go out of it’s way to be user friendly, it requires an external tool like GTKWave to display waveforms, and it’s got some features and switches that I’m not even sure what are for, but it is documented and seems to be quite reasonable.
One feature Icarus doesn’t (AFIK) have is the ability to synthesize to the various programmable chips (which are all very, very proprietary). I do have my own FPGA board, which I got in a burst of excitement after first being exposed to FPGAs, and have never had a chance to play with as much as I’d like. Somewhere deep, deep down on the list of projects is to get a decent programming cable for it (my current one is an old parallel model), and spend some quality time playing around with it, I clearly wouldn’t be alone.