Source: More Than Moore
Article note: Someone takin' another run at a general purpose data flow machine.
They have a real-looking C compiler. Their claim to differentiation is that it's a much more flexible fabric that allows feedback paths (eg. not one of the many straight-systolic-array designs).
Flagship part has a control core (which happens to be a RISCV), small volatile and non-volatile memories onboard, and a good assortment of uC type peripherals in addition to the array.
I can't tell from the article or any obvious public docs how static it is, that's usually what kills these things, because (Say it with me now), you can't statically schedule dynamic behavior.
I think the product is closer to the FPSLIC market than the historical dataflow HPC stuff, which is probably more likely to pan out, since there are lots of static type things you want an embedded controller to do.
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