Daily Archives: 2021-03-03

Google claims it will stop tracking individual users for ads

Source: Ars Technica

Article note: I'm all for reducing the identifier surface in the web, but this definitely has a "we're building the spyware into Chrome because we control the browser" feel to it. That's a game that only Apple, Microsoft, and Google are really able to play.
The word

Enlarge (credit: Aurich Lawson / Getty Images)

As Google's plan to kill third-party tracking cookies ramps up, the company is answering questions about what will replace it. Many people have wondered: if Google kills cookies, won't the company just cook up some other method for individually tracking users?

Today, Google answered that concern in a post on its "Ads & Commerce" blog, pledging it won't come up with "any technology used for tracking individual people." The company wrote:

We continue to get questions about whether Google will join others in the ad tech industry who plan to replace third-party cookies with alternative user-level identifiers. Today, we’re making explicit that once third-party cookies are phased out, we will not build alternate identifiers to track individuals as they browse across the web, nor will we use them in our products.

You might look at that statement and think that Google is sacrificing something or turning over a new leaf when it comes to privacy, but really, Google doesn't need to track individuals for advertisements. Google's cookie-tracking replacement technology, the Chrome "Privacy Sandbox," uses group tracking, which is more in line with how advertisers think anyway.

Read 4 remaining paragraphs | Comments

Posted in News | Leave a comment

Germanium transistors: logic circuits in the IBM 1401 computer

Source: Ken Shirriff's blog

Article note: I went on a reading binge about the Philco and DEC (eg. https://hackaday.io/project/8449-hackaday-ttlers/log/130460-bizarre-dtl-logic-levels-the-discrete-component-pdp-8, mostly using Philco surface-barrier transistors) early transistorized machines the other day, and they are "weird." I didn't realize the 1401 was "IBM Weird" with this "We made several different kinds of DTL gate, some with PNP and one with NPN, you have to alternate them so the voltage levels work, they take different supplies, and there are 21 different options for those voltages" business. Plus some gates with pullups and some without to rig wired-OR, and all the other batshit "we're going to shave a transistor by any means necessary because it's 1959" antics Ken gets in to here.

How did computers implement logic gates in the 1950s? Computers were moving into the transistor age, but transistors were expensive so circuits were optimized to minimize the transistor count. At the time, they didn't even use silicon transistors; germanium transistors were used instead. In this blog post, I'll describe one way that logic gates were implemented back then: diode-transistor logic.

The IBM 1401 computer, showing some of the cards inside. (Click any image for a larger version.)

The IBM 1401 computer, showing some of the cards inside. (Click any image for a larger version.)

The IBM 1401 computer, above, was introduced in 1959 and became the most popular computer of the early 1960s, with more than 10,000 in operation. It was constructed from thousands of circuit cards, each implementing a function such as a few logic gates. The logic gates in the IBM 1401 use (for the most part) a simple form of logic called CTDL (Complemented Transistor Diode Logic) by IBM and DTL (Diode-Transistor Logic) by the rest of the world. As the names suggested, these gates are built from diodes in conjunction with a transistor.1

This SMS card (type CHWW) implements three NAND gates so there are three transistors.

This SMS card (type CHWW) implements three NAND gates so there are three transistors.

These cards are about the size of a playing card and called SMS cards, Standard Modular System.32 Each type of card has a code, typically four letters. The card above is a "CHWW" card, implementing three NAND gates. It contains a handful of components: transistors, diodes, resistors, and inductors. One unusual component is the jumper bar in the middle, called a "program cap". Breaking off tabs from this bar allowed the functionality of the card to be changed slightly so one card could fill multiple roles. The back of the card (below) shows the traces of the printed circuit board as well as the connector with 16 gold-plated contacts. More details of the CHWW card are in my SMS card database.

The back of the card has the PCB traces and the gold-plated edge connector.

The back of the card has the PCB traces and the gold-plated edge connector.

Logic circuit implementation

The CHWW card contains three NAND gates. The schematic below, from IBM's 1959 documentation, shows one of these gates. Note IBM's unusual symbol for a transistor, showing the N-P-N structure explicitly, with an external arrow for the emitter.

Schematic of a NAND logic circuit built from a type 83 transistor. From Standard Modular System Component Circuits, p43.

Schematic of a NAND logic circuit built from a type 83 transistor. From Standard Modular System Component Circuits, p43.

I've redrawn the schematic below using modern symbols. The arrows show (qualitatively) what happens when the gate has two high inputs. The left arrow indicates the current through the resistor and the transistor's base. This base current turns the transistor on, connecting the output to -6 volts, and producing a low output.

If both inputs are high, the output of the gate is low.

If both inputs are high, the output of the gate is low.

If there are one (or two) low inputs, however, the resistor's current flows out through the diode, rather than through the transistor. With the transistor off, the output is pulled high by the pull-up resistor. The result is a NAND gate: the output is low only if both inputs are high. In this circuit, the diodes are the components that compute the logic function.4 The transistor amplifies (and inverts) the result.5

If an input is low, the output of the gate is high.

If an input is low, the output of the gate is high.

There's a problem with this gate though. The output voltages are approximately +6 volts for a high signal and -6 volts for a low signal. You'd like the gate to switch when an input is roughly in the middle of this range. Unfortunately, the transistor in this circuit will switch when the input is around -6 volts. Thus, the input voltage and output voltage levels are incompatible and you can't connect two gates together.

There are several solutions to this problem. The first solution is to use additional diodes and transistors to shift the voltage levels to be compatible. Fairchild used this approach in their popular Micrologic line of DTL integrated circuits in the 1960s.9 The second solution (used in IBM's SDTDL circuits) is to shift the voltage levels by using additional resistors.

The 1401's gates, instead, uses a surprising solution that avoided extra components. In the gate above, the output voltage levels are raised up compared to the input. But a similar gate with PNP transistors instead of NPN transistors will have the opposite property: the output levels will be lowered. So IBM's solution was to alternate gates built with NPN transistors with gates built with PNP transistors. The first gate raises the voltage level up, and the second gate lowers it back down. You have twice as many types of gates, and it's more complex to design, but you avoid the expense of additional components.

The photo below shows the PNP-based NAND gate card. It is almost identical to the previous NPN card, except the transistors are PNP instead of NPN. The other difference is that it is powered with -12V and 0V instead of -6V and 6V.6

The CGWW NAND card is built with PNP transistors.

The CGWW NAND card is built with PNP transistors.

In more detail, for the NPN gate we first examined, the input switches around -6 volts, and the output is about -6 volts or 6 volts. In the corresponding PNP gate, the input switches around 0 volts, and the output is -12 volts or 0 volts. IBM called the -6V/6V levels type "T" and the 0V/12V levels type "U", so an NPN gate has a U input and a T output, while a PNP gate has a T input and a U output.7 By alternating NPN gates and PNP gates, you have T outputs going to T inputs and U outputs going to U inputs, and everything works.8

The diagram below shows part of the logic diagram from the 1401's adder, heavily simplified. Two type U signals go into the first CHWW gate, which outputs a T signal. The 4JMX gate is a PNP NAND gate that takes T inputs and outputs a U. The CRZV is an NPN buffer that converts U to T. Finally, CNWT is an NPN driver that amplifies a T signal, in this case a binary carry-out signal. Note how the signals alternate between T and U (except for the last special driver).

Simplified excerpt from an IBM ALD logic diagram, page

Simplified excerpt from an IBM ALD logic diagram, page


There's one more interesting trick with these logic gates: wired-OR. The idea is that you can wire the outputs of several NAND gates together. If any gate outputs a logical 0, that gate will pull the output low. If all gates output a logical 1, the output will be pulled high by the pull-up resistor. The resulting circuit implements an AND-OR-Invert gate. The diagram below illustrates how the NAND gates are wired together and how the circuit behaves logically. Wired-OR circuits are widely used in the 1401 because you get the OR gate "for free", minimizing circuitry.

An AND-OR-Invert gate. This shows two NAND gates but more can be connected.

An AND-OR-Invert gate. This shows two NAND gates but more can be connected.

There's one minor issue with wired-OR: if you wire standard NAND gates together, you end up with multiple pull-up resistors in parallel, which will affect the gate behavior. The solution is to use gates without pull-up resistors, except for one gate that has the pull-up resistor. For example, the 4JMX card has the pull-up resistor (called a "collector load"), while the 3JMX card lacks it. Thus, a wired-OR could use one 4JMX card and the rest would be 3JMX. (This is one reason why there are so many different types of SMS cards.)

Since each card only implements a small amount of logic, the IBM 1401 computer requires thousands of cards. The photo below shows how they are mounted inside the computer. I won't go into more detail here about how SMS cards are combined to create functional units, but I've written about the circuitry in the 1401's adder if you want to learn more.

SMS cards installed in the IBM 1401 computer. The fan at the left keeps the cards cool.

SMS cards installed in the IBM 1401 computer. The fan at the left keeps the cards cool.

The transistors

These gates use bipolar NPN and PNP transistors, types of transistors that are still used today. But the germanium alloy-junction transistors were completely different from modern silicon planar transistors. The photo below shows the construction of an NPN alloy transistor, It consists of a P-type germanium crystal base with tin/antimony beads fused on either side to form the emitter and collector. The regions of germanium-antimony alloy form the "N" regions. The resulting N-P-N layers form the NPN transistor. (A PNP transistor is formed similarly, using indium for the alloy.)10 In the photo, the vertical metal plate is the base contact with the tiny germanium disk in the circular hole. Copper wires are connected to the indium beads on either side of the germanium disk.

Inside a germanium alloy-junction transistor used in the IBM 1401 computer. This is an IBM type 083
NPN transistor. Photo from
  IBM 1401 restoration team

Inside a germanium alloy-junction transistor used in the IBM 1401 computer. This is an IBM type 083 NPN transistor. Photo from IBM 1401 restoration team

The 1950s were a time of rapid change in transistor technology. The transistor was invented at Bell Labs in 1947. General Electric invented the alloy junction transistor (used in the 1401) in 1950. In 1953, the drift transistor was created, faster because of its doping gradient. IBM used drift transistors in the Saturated Drift Transistor Diode Logic (SDTDL) family. The first silicon transistors were introduced in 1954. The wafer-based mesa transistor was invented in 1958, followed by the modern planar transistor in 1959. Thus, transistors were undergoing radical changes in the 1950s and IBM introduced new logic families to take advantage of these new transistor types.


Diode-transistor logic was a key part of IBM's early computers such as the IBM 1401. In 1964, IBM introduced the groundbreaking System/360 line of mainframes. These computers still used diode-transistor logic, but instead of SMS cards with discrete components, the logic was encapsulated in small SLT modules (below) that contained tiny silicon transistors and diodes. An SLT module was roughly equivalent to an SMS card but just half an inch on a side and almost 100 times as reliable. The density, low cost, and reliability of SLT modules were important to the success of the System/360 line.

A board with 24 SLT modules on it, probably from the System/360. The 361453 modules implement AND-OR-Invert.

A board with 24 SLT modules on it, probably from the System/360. The 361453 modules implement AND-OR-Invert.

In the 1960s, diode-transistor logic integrated circuits were introduced. But DTL was soon eclipsed by the rise of TTL (transistor-transistor logic) in the late 1960s. In the 1970s, integrated circuits with MOS transistor logic became common, especially for microprocessors. CMOS logic took over in the 1980s and it's still the most popular logic family. Thanks to Moore's Law, technology has progressed from the IBM 1401 era with a few transistors on a board to modern microprocessors with billions of transistors on a chip.

The Computer History Museum in Mountain View, CA has two working 1401 computers, so stop by for a demo (once the pandemic is over). Thanks to bogomipz for suggesting this topic. Thanks to Randall Neff and Henk Stegeman for SMS card photos. I announce my latest blog posts on Twitter, so follow me @kenshirriff. I also have an RSS feed.

Notes and references

  1. IBM used a dizzying assortment of logic families in that era. Even the 1401 used multiple families (mostly the CTDL discussed above but also current-mode and STDTL in the TAU tape controller, and occasional SDTRL).

    The table below from 1963 summarizes IBM's numerous logic families. CTRL (Complemented Transistor Resistor Logic) used alloy-junction transistors. It was slow, operating below 200 kilohertz. CTDL (Complemented Transistor Diode Logic) also used alloy-junction transistors but operated up to 250 kilohertz. (The Complemented families alternate NPN and PNP circuits.) Current mode (similar to emitter-coupled logic) was much faster as transistors weren't saturated and the voltage swings were small (±.4V). It operated at 1 megahertz with alloy-junction transistors, and 7 megahertz with diffused junction transistors.

    IBM's logic families from DDTL Component Circuits, 1963, p5.

    IBM's logic families from DDTL Component Circuits, 1963, p5.

    For more discussion, see Transistor Component Circuits and Logic families in the 1401. There's an interesting discussion in Wikipedia's DTL talk page by William Crouse, who designed many of the SDTDL circuits at IBM. 

  2. IBM also offered SMS cards as components for other companies to use in products. The announcement below is from Datamation in 1966.

    A product announcement for SMS cards from Datamation, 1966.

    A product announcement for SMS cards from Datamation, 1966.


  3. The idea behind Standard Module System cards was that IBM could manufacture a small number of standardized cards and build systems from them. Unfortunately, standardization worked better in theory than in practice and IBM ended up with thousands of different card types. As well as logic functions, SMS cards had a wide variety of roles including oscillators, printer drivers, core memory arrays, sense amplifiers, power supply regulation, and tape preamps. 

  4. Many vacuum tube computers used semiconductor diodes as a key part of their logic gates. I think that diodes don't get the recognition they deserve; computer generations are divided into tube versus transistor, without recognizing the gradual introduction of semiconductors in the form of diodes. 

  5. Note the inductor connected to the output of the gate. The inductor increases the speed when pulling the output high. The problem is that the output is pulled high through a resistor, so any capacitance on the output wire results in a delay as it is charged. The inductor counteracts this capacitance. To handwave, once the resistor starts pulling the signal up, the inductor keeps the current flowing. More discussion of the peaking coil here

  6. Here's the schematic of the PNP-based NAND gate used in the CGWW card. It is similar to the NPN-based gate, except the circuit is flipped and runs off -12 volts.

    Schematic of a CGWW logic circuit. From Standard Modular System Component Circuits, p42.

    Schematic of a CGWW logic circuit. From Standard Modular System Component Circuits, p42.


  7. IBM used a remarkable number of different voltage levels for its logic families. The CTDL gates described in this article used the "T" and "U" levels. The table below gives the others.

    IBM's logic families used numerous incompatible voltage levels. From the IBM 1401 Pocket Reference.

    IBM's logic families used numerous incompatible voltage levels. From the IBM 1401 Pocket Reference.


  8. I should point out that having two sets of voltage levels makes debugging the 1401 system very confusing. If you measure -3 volts, for instance, this is a logical low for a T signal and a logical high for a U signal. The wired-OR gates also make debugging inconvenient. If the output is low, you can't easily tell which NAND gate is pulling the output low, and these NAND gates may be on different cards with many different inputs. 

  9. The schematic below shows the implementation of a NAND gate in the Fairchild Micrologic family of integrated circuits. This circuit uses an additional transistor and diode to shift the voltage levels. This was practical in an integrated circuit because the additional components had minimal cost. This circuit wouldn't have worked well in the IBM 1401 because the 1401's germanium components provided a much smaller voltage shift than the silicon components in the Fairchild IC.

    Schematic of a Fairchild Micrologic DTL gate from the databook.

    Schematic of a Fairchild Micrologic DTL gate from the databook.


  10. The periodic table shows why elements such as indium were used in the alloy transistors. Note that the semiconductor germanium is in the same column as silicon, which later replaced it. Indium and gallium are in the column to the left, so they have one fewer valence electron. Thus, adding them to the semiconductor makes it more positive (P-type), since electrons are negative. Antimony is to the right; its additional valence electron makes the semiconductor negative (N-type). Tin, in the same column as germanium, was used in the alloy but has no effect on the semiconductor properties.

    This excerpt of the periodic table shows key elements in transistor construction. Source: NCBI.

    This excerpt of the periodic table shows key elements in transistor construction. Source: NCBI.


Posted in News | Leave a comment

U of Florida suspends professors blamed in student’s suicide

Source: Inside Higher Ed (news)

Article note: The whole situation has been such a worst-suspicion-confirming saga. I'm pleased (and a little surprised) that the ACM acted on the whole ring, and U. Florida acted against the apparent perpetrators in their employ... and very irritated but not surprised that IEEE is still "no comment."

The University of Florida put a professor of computer engineering on leave last month amid a lengthy investigation into the suicide of one of his graduate students.

Publicly, the university has said little about the case. The professor, Tao Li, did not respond to a request for comment but has previously denied any involvement in the student’s death. But friends of the late Ph.D. candidate, Huixiang Chen, have said Li pressured, threatened and otherwise mistreated him.

A Feb. 15 suspension letter to Li from his department chair says he is prohibited from engaging in “any activity that involves any aspect of your position, including business travel, consultation with faculty, staff or students.” Li may not be physically present on campus for “any reason” during his suspension. He must also refrain from having any contact with faculty, staff or students “by any means,” including phone calls, texts and emails, unless first obtaining explicit permission from the university.

The letter, first obtained through an open records request by WUFT-FM, also commands Li to cooperate with all ongoing investigations or be terminated immediately.

Feeling Like There’s No Way Out

Chen, an international student from China, died on campus in June 2019. Soon after, someone called “Huixiang Voice” published a post on Medium suggesting that Li was at fault. The post quoted a note that Chen allegedly sent friends and colleagues about his state of mind. He said that he’d submitted a conference paper for the 2019 International Symposium on Computer Architecture “in a very short time and it was submitted and accepted very quickly,” due in part of Li’s “networking” and Li having friends among the reviewers.

Even though it was accepted, Chen said the paper suffered from “very severe issues: the design doesn’t make any sense and the reviewers also pay no attention to it.”

Ahead of the actual conference, Chen said he was reworking the paper and making up for missing experiments. Yet “During those experiments, I found that the phenomenon of the experiments and the design was different from what was claimed before, which made this paper doesn’t make any sense [sic] from title to characterization and to design.”

Chen said Li told him to fix the paper himself, and, “Until today I am still unable to patch up any of those issues. These issues are too obvious which can be easily caught by any experts of accelerator. I have no words to comment that Dr. Li acquiesced to the data which makes no sense.”

Chen said he couldn’t see any way out of his predicament: “I hope you can keep simple and stay honest in this society. I will bless you in another world.”

The Medium post included other screenshots of messages that Chen allegedly sent friends before his death, shedding more light on his relationship with Li.

“I feel my mentor has no academic integrity,” Chen wrote, according to the screenshots. “I feel disgusting. I really want to die when patching up this paper. I am doing my best.”

Apparently referring to Li, Chen also wrote, “He pushed me to fake, if I can’t publish the paper before deadline. I have no regrets. At least I have done my best.”

Later, Chen texted, “I had a fight with him. And the police almost come. He refused to withdraw the paper resolutely.”

And, later, “My mentor’s words are, if I destroy his reputation he will kill me. He said this is his bottom line.”

‘Clear and Convincing Evidence’

The University of Florida began to investigate these allegations, as did the Association for Computing Machinery and the IEEE, the world’s largest technical professional society. In a February statement, the groups said that they initially found no evidence of wrongdoing with respect to the conference paper, based on the evidence available to them at the time. Additional information, including a new witness, came to light in early 2020, however, the groups said. A more thorough investigation based on this new information determined “clear and convincing evidence that several individuals implicated in the investigation had intentionally breached the peer review process for ISCA '19 by repeatedly sharing reviewers’ names and reviewer scores connected with submissions.” The unnamed individuals further “colluded in supporting a submission by asking other individuals to draft messages to be posted in the conference’s review system.”

Crucially, with respect to Chen and Li, the associations found “clear and convincing evidence that an ISCA '19 author had coerced a co-author to proceed with a submission despite that co-author’s repeatedly-expressed concerns about the correctness of the results reported in the work.”

Disciplinary action was taken, in some cases appealed and ultimately upheld, the groups said. “ACM’s Publications Board has assessed penalties ranging from warning letters to a 15-year ban on participation in any ACM publication or reviewing activities,” the statement says. “Furthermore, some individuals are now being investigated by IEEE as well as ACM’s ethics committee for additional violations.”

Florida took action against Li days after the findings were published.

WUFT-FM reported that Li previously corresponded via email with reporters as part of a five-month investigation into Chen’s death by Florida’s College of Journalism and Communications. In some of those emails, Li reportedly accused Chen’s friends of “intensively and maliciously spreading such false statements and misleading information over the internet to attack me and my family.”

Li reportedly said he promised to make his accusers “pay for what they did,” saying he’d met with “authorized personnel who are involved with the investigation and provided both witnesses and evidences to disprove those fake/false allegations on me.”

WUFT-FM also interviewed friends of Chen’s who corroborated the allegations on Medium. Several witnesses, including an administrative assistant, said they’d hearing screaming in Chinese and items crashing to the floor during a closed-door meeting between Chen and Li in Li’s office days ahead of Chen’s death.

Chen, who came to Gainesville in 2013, reportedly told friends that Li also treated him like a “personal secretary." He reportedly said that Li asked him to drive his wife and father-in-law around and run errands unrelated to his studies.

Students at Risk

This kind of behavior, while shocking, is not unprecedented. Many graduate students complain that their advisers treat them unprofessionally and that they have little recourse because the mentor has so much power -- in money, resources, connections and reputation -- over the mentee in the traditional academic apprenticeship model.

In another tragedy, John Brady, a Ph.D. candidate in engineering at the University of Wisconsin at Madison, died by suicide in 2016 after trying to sound the alarm on his lab’s toxic leader. An internal report commissioned after Brady’s death found that the professor, Akbar Sayeed, regularly cursed at students, threatened to “fire” them and called them “monkeys,” “babies,” “dumb asses” and “liars.” Sayeed was also found to have made “ambiguous physical threats” and “limited academic goals and achievements of several students and caused emotional distress.”

Sayeed was suspended for two years, but the Wisconsin-State Journal found that Madison had failed to promptly inform the National Science Foundation about the punishment, enabling him to actually work at the NSF during his leave. Sayeed has apologized for his behavior.

International students, whose legal status is this country is wrapped up in their performance as students, and who may have different cultural perspectives on mental health, may be particularly vulnerable to predatory faculty members.

In 2018, several students from India accused Ashim Mitra, a now-former professor of pharmacy at the University of Missouri at Kansas City, of requiring them to do housework for him -- and then threatening their place at the university if they refused. In 2019, UMKC university settled with a second professor, Mridul Mukherji, who said he’d complained about what Mitra was doing but was retaliated against instead of taken seriously.

The University of Illinois at Urbana-Champaign is currently facing a trafficking lawsuit filed by two female students from China. The women previously accused Gary Gang Xu, a now-former professor of art history, of bullying and sexual misconduct, and of targeting women from China in particular. Xu, who was suspended in 2016 and resigned in 2018, denied the allegations and is countersuing his accusers.

The women allege that they tried to alert the university to what was happening but that Illinois tried to keep it quiet so as not to damage its reputation among other current and potential Chinese students. UIUC didn't comment on the lawsuit but said in a statement that "issues of sexual misconduct and sexual harassment threaten every aspect of our university missions and they inflict personal and professional harm on members of our community." The university "investigates and takes appropriate action whenever conduct is reported that may jeopardize or impact the safety or security of our students or others."

The University of Florida did not respond to a request for further details about the Li case.

In the wake of Brady’s death, Madison made numerous changes to better protect students, including boosting faculty and staff training on appropriate workplace behavior and building awareness of mental health resources. The department of electrical and computer engineering in particular appointed faculty members to serve as primary points of contact for confidential support, advocacy and resource referral, along with grievance reporting and problem resolution. The program is also monitoring turnover in research groups and working to build community among graduate students.

Still, many critics of graduate education say students remain at risk of toxic advisers as long their academic success remains so dependent on a single adviser. Groups such as the Modern Language Association have recommended adopting a collaborative or “networked” advising model instead, along with increased faculty “bystander responsibility.”

Image Caption: 
Huixiang Chen
Is this diversity newsletter?: 
Newsletter Order: 
Disable left side advertisement?: 
Is this Career Advice newsletter?: 
Magazine treatment: 
Trending text: 
Professor Blamed for Student's Suicide
Trending order: 
Display Promo Box: 
Live Updates: 
Posted in News | Leave a comment