{"id":45766,"date":"2021-08-19T15:05:48","date_gmt":"2021-08-19T19:05:48","guid":{"rendered":"http:\/\/pappp.net\/?guid=9029fee8a5f5d8d537f80dc5baca3119"},"modified":"2021-08-19T15:05:48","modified_gmt":"2021-08-19T19:05:48","slug":"intel-leaks-show-next-gen-desktop-cpus-with-hybrid-big-little-design","status":"publish","type":"post","link":"https:\/\/pappp.net\/?p=45766","title":{"rendered":"Intel leaks show next-gen desktop CPUs with hybrid \u201cbig.little\u201d design"},"content":{"rendered":"<p class=\"syndicated-attribution\">Source: <a href=\"https:\/\/arstechnica.com\/?p=1788521\">Ars Technica<\/a><\/p>\n<div style=\"background-color : #fff7d5;\n\t\t\tborder-width : 1px; padding : 5px; border-style : dashed; border-color : #e7d796;margin-bottom : 1em; color : #9a8c59;\">Article note: The problem with all the BIG.little\/Hybrid\/Heterogeneous core designs is that OS schedulers that can use them effectively are somewhere between \"experimental\" and \"active theoretical research topics.\"  \n\nMicrosoft seems to have something rolling out with Windows 11, and I'm _guessing_ it's the retarded child of the nifty convex optimization stuff they had going at Microsoft Research like a decade ago (RIP Burton Smith), but there is not a known-good solution in general for HMP\/Energy Aware\/etc. scheduling, and platforms that can do that are stuck in chicken-and-egg hell until there are better software solutions.<\/div><div>\n<figure><img src=\"https:\/\/cdn.arstechnica.net\/wp-content\/uploads\/2021\/08\/GettyImages-684141408-800x534.jpg\" alt=\"It's a bit too early for photos of Alder Lake-S CPUs, much less Raptor Lake-S&mdash;so here's a gorgeous photo of an alder tree on the shore of Llyn Gwynant, in North Wales' Snowdonia National Park.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><p><a href=\"https:\/\/cdn.arstechnica.net\/wp-content\/uploads\/2021\/08\/GettyImages-684141408.jpg\" rel=\"noopener noreferrer\">Enlarge<\/a> <span>\/<\/span> It's a bit too early for photos of Alder Lake-S CPUs, much less Raptor Lake-S&mdash;so here's a gorgeous photo of an alder tree on the shore of Llyn Gwynant, in North Wales' Snowdonia National Park. (credit: <a rel=\"noopener noreferrer\" href=\"https:\/\/www.gettyimages.com\/detail\/photo\/alder-tree-beside-llyn-gwynant-snowdonia-national-royalty-free-image\/684141408\">R A Kearton via Getty Images<\/a>)<\/p>  <\/figure><div><a name=\"page-1\"><\/a><\/div>\n<p>It looks like <a href=\"https:\/\/en.wikipedia.org\/wiki\/Heterogeneous_computing\" rel=\"noopener noreferrer\">big.little<\/a> CPU design&mdash;an architecture that includes both fast, power-hungry cores and slower, more power-efficient cores&mdash;is here to stay in the x86_64 world, according to unverified insider information leaked by <a href=\"https:\/\/wccftech.com\/intel-raptor-lake-s-desktop-cpu-lineup-leaks-out-core-i9-with-up-to-24-raptor-cove-architecture\/\" rel=\"noopener noreferrer\">wccftech<\/a> and <a href=\"https:\/\/www.youtube.com\/watch?v=NQNd0_X6Ca8\" rel=\"noopener noreferrer\">AdoredTV<\/a>.<\/p>\n<h2>Intel&rsquo;s big\/little designs enter round two<\/h2>\n<p>At Intel's 2021 Architecture day, the company confirmed that its upcoming Alder Lake (12th generation) processors will use a mixture of performance and efficiency cores. This brings the company's <a href=\"https:\/\/www.techradar.com\/news\/intel-discontinues-hybrid-technology-lakefield-processors\" rel=\"noopener noreferrer\">discontinued<\/a> 2020&nbsp;<a href=\"https:\/\/newsroom.intel.com\/press-kits\/lakefield\/\" rel=\"noopener noreferrer\">Lakefield<\/a> design concept firmly into the mainstream.<\/p>\n<p>Big.little designs run time-sensitive tasks on bigger, hotter performance cores while running background tasks on slower but much less power-hungry cores. This architecture is near-universal in the ARM world&mdash;which now includes Apple M1 Macs as well as Android and iOS phones and tablets&mdash;but it's far less common in the x86_64 \"traditional computing\" world.<\/p><\/div><p><a href=\"https:\/\/arstechnica.com\/?p=1788521#p3\" rel=\"noopener noreferrer\">Read 12 remaining paragraphs<\/a> | <a href=\"https:\/\/arstechnica.com\/?p=1788521&amp;comments=1\" rel=\"noopener noreferrer\">Comments<\/a><\/p><div>\n<a href=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?a=7PZGuyz8ctg:pF7fj_htRUA:V_sGLiPBpWU\" rel=\"noopener noreferrer\"><img src=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?i=7PZGuyz8ctg:pF7fj_htRUA:V_sGLiPBpWU\" border=\"0\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a> <a href=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?a=7PZGuyz8ctg:pF7fj_htRUA:F7zBnMyn0Lo\" rel=\"noopener noreferrer\"><img src=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?i=7PZGuyz8ctg:pF7fj_htRUA:F7zBnMyn0Lo\" border=\"0\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a> <a href=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?a=7PZGuyz8ctg:pF7fj_htRUA:qj6IDK7rITs\" rel=\"noopener noreferrer\"><img src=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?d=qj6IDK7rITs\" border=\"0\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a> <a href=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?a=7PZGuyz8ctg:pF7fj_htRUA:yIl2AUoC8zA\" rel=\"noopener noreferrer\"><img src=\"http:\/\/feeds.feedburner.com\/~ff\/arstechnica\/index?d=yIl2AUoC8zA\" border=\"0\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>Enlarge \/ It&#8217;s a bit too early for photos of Alder Lake-S CPUs, much less Raptor Lake-S\u2014so here&#8217;s a&#8230;<\/p>\n<p> <a href=\"https:\/\/pappp.net\/?p=45766\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[226],"tags":[],"class_list":["post-45766","post","type-post","status-publish","format-standard","hentry","category-news-2"],"_links":{"self":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts\/45766","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=45766"}],"version-history":[{"count":0,"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts\/45766\/revisions"}],"wp:attachment":[{"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=45766"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=45766"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=45766"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}