{"id":35708,"date":"2021-03-03T13:16:18","date_gmt":"2021-03-03T18:16:18","guid":{"rendered":"http:\/\/pappp.net\/?guid=c93c086f8da74793916877f31217f097"},"modified":"2021-03-03T13:16:18","modified_gmt":"2021-03-03T18:16:18","slug":"germanium-transistors-logic-circuits-in-the-ibm-1401-computer","status":"publish","type":"post","link":"https:\/\/pappp.net\/?p=35708","title":{"rendered":"Germanium transistors: logic circuits in the IBM 1401 computer"},"content":{"rendered":"<p class=\"syndicated-attribution\">Source: <a href=\"http:\/\/www.righto.com\/2021\/03\/germanium-transistors-logic-circuits-in.html\">Ken Shirriff's blog<\/a><\/p>\n<div style=\"background-color : #fff7d5;\n\t\t\tborder-width : 1px; padding : 5px; border-style : dashed; border-color : #e7d796;margin-bottom : 1em; color : #9a8c59;\">Article note: I went on a reading binge about the Philco and DEC (eg. https:\/\/hackaday.io\/project\/8449-hackaday-ttlers\/log\/130460-bizarre-dtl-logic-levels-the-discrete-component-pdp-8, mostly using Philco surface-barrier transistors) early transistorized machines the other day, and they are \"weird.\"  \r\nI didn't realize the 1401 was \"IBM Weird\" with this \"We made several different kinds of DTL gate, some with PNP and one with NPN, you have to alternate them so the voltage levels work, they take different supplies, and there are 21 different options for those voltages\" business.  Plus some gates with pullups and some without to rig wired-OR, and all the other batshit \"we're going to shave a transistor by any means necessary because it's 1959\" antics Ken gets in to here.<\/div><p>How did computers implement logic gates in the 1950s?\nComputers were moving into the transistor age, but transistors were expensive so circuits were optimized to minimize the transistor count.\nAt the time, they didn't even use silicon transistors; germanium transistors were used instead.\nIn this blog post, I'll describe one way that logic gates were implemented back then: diode-transistor logic.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate.jpg\" rel=\"noopener noreferrer\"><img alt=\"The IBM 1401 computer, showing some of the cards inside. (Click any image for a larger version.)\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate-w500.jpg\" title=\"The IBM 1401 computer, showing some of the cards inside. (Click any image for a larger version.)\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>The IBM 1401 computer, showing some of the cards inside. (Click any image for a larger version.)<\/div>\n<p>The IBM 1401 computer, above, was introduced in 1959 and became the most popular computer of the early 1960s, with more than 10,000 in\noperation.\nIt was constructed from thousands of circuit cards, each implementing a function such as a few logic gates.\nThe logic gates in the IBM 1401 use (for the most part) a simple form of logic called\n<a href=\"http:\/\/ibm-1401.info\/LogicFamilies1401-CClaunch.html\" rel=\"noopener noreferrer\">CTDL<\/a> (Complemented Transistor Diode Logic) by IBM and <a href=\"https:\/\/en.wikipedia.org\/wiki\/Diode%E2%80%93transistor_logic\" rel=\"noopener noreferrer\">DTL<\/a> (Diode-Transistor Logic) by the rest of the world.\nAs the names suggested, these gates are built from diodes in conjunction with a transistor.<span><a href=\"https:\/\/pappp.net\/#fn:families\" rel=\"noopener noreferrer\">1<\/a><\/span><\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-labeled.jpg\" rel=\"noopener noreferrer\"><img alt=\"This SMS card (type CHWW) implements three NAND gates so there are three transistors.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-labeled-w500.jpg\" title=\"This SMS card (type CHWW) implements three NAND gates so there are three transistors.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>This SMS card (type CHWW) implements three NAND gates so there are three transistors.<\/div>\n<p>These cards are about the size of a playing card and called SMS cards, Standard Modular System.<span><a href=\"https:\/\/pappp.net\/#fn:standardization\" rel=\"noopener noreferrer\">3<\/a><\/span><span><a href=\"https:\/\/pappp.net\/#fn:ad\" rel=\"noopener noreferrer\">2<\/a><\/span>\nEach type of card has a code, typically four letters. The card above is a \"CHWW\" card, implementing three NAND gates.\nIt contains a handful of components: transistors, diodes, resistors, and inductors.\nOne unusual component is the jumper bar in the middle, called a \"program cap\".\nBreaking off tabs from this bar allowed the functionality of the card to be changed slightly so one card could fill multiple roles.\nThe back of the card (below) shows the traces of the printed circuit board as well as the connector with 16 gold-plated contacts.\nMore <a href=\"http:\/\/static.righto.com\/sms\/CHWW.html\" rel=\"noopener noreferrer\">details of the CHWW card<\/a> are in my <a href=\"https:\/\/righto.com\/sms\" rel=\"noopener noreferrer\">SMS card database<\/a>.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-back.jpg\" rel=\"noopener noreferrer\"><img alt=\"The back of the card has the PCB traces and the gold-plated edge connector.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-back-w500.jpg\" title=\"The back of the card has the PCB traces and the gold-plated edge connector.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>The back of the card has the PCB traces and the gold-plated edge connector.<\/div>\n<h2>Logic circuit implementation<\/h2>\n<p>The CHWW card contains three NAND gates. The schematic below, from IBM's 1959 documentation, shows one of these gates.\nNote IBM's unusual symbol for a transistor, showing the N-P-N structure explicitly, with an external arrow for the emitter.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-schematic.jpg\" rel=\"noopener noreferrer\"><img alt=\"Schematic of a NAND logic circuit built from a type 83 transistor. From Standard Modular System Component Circuits, p43.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/chww-schematic-w300.jpg\" title=\"Schematic of a NAND logic circuit built from a type 83 transistor. From Standard Modular System Component Circuits, p43.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>Schematic of a NAND logic circuit built from a type 83 transistor. From <a href=\"http:\/\/ibm-1401.info\/IBM-StandardModularSystem-Neff7.pdf\" rel=\"noopener noreferrer\">Standard Modular System Component Circuits<\/a>, p43.<\/div>\n<p>I've redrawn the schematic below using modern symbols.\nThe arrows show (qualitatively) what happens when the gate has two high inputs.\nThe left arrow indicates the current through the resistor and the transistor's base.\nThis base current turns the transistor on, connecting the output to -6 volts, and producing a low output.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate-low.jpg\" rel=\"noopener noreferrer\"><img alt=\"If both inputs are high, the output of the gate is low.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate-low-w300.jpg\" title=\"If both inputs are high, the output of the gate is low.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>If both inputs are high, the output of the gate is low.<\/div>\n<p>If there are one (or two) low inputs, however, the resistor's current flows out through the diode, rather than through the transistor.\nWith the transistor off, the output is pulled high by the pull-up resistor.\nThe result is a NAND gate: the output is low only if both inputs are high.\nIn this circuit, the diodes are the components that compute the logic function.<span><a href=\"https:\/\/pappp.net\/#fn:diodes\" rel=\"noopener noreferrer\">4<\/a><\/span>\nThe transistor amplifies (and inverts) the result.<span><a href=\"https:\/\/pappp.net\/#fn:inductor\" rel=\"noopener noreferrer\">5<\/a><\/span><\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate-high.jpg\" rel=\"noopener noreferrer\"><img alt=\"If an input is low, the output of the gate is high.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate-high-w300.jpg\" title=\"If an input is low, the output of the gate is high.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>If an input is low, the output of the gate is high.<\/div>\n<p>There's a problem with this gate though. The output voltages are approximately +6 volts for a high signal and -6 volts for a low signal.\nYou'd like the gate to switch when an input is roughly in the middle of this range.\nUnfortunately, the transistor in this circuit will switch when the input is around -6 volts. Thus, the input voltage and output\nvoltage levels are incompatible and you can't connect two gates together.<\/p>\n<p>There are several solutions to this problem.\nThe first solution is to use additional diodes and transistors to shift the voltage levels to be compatible.\nFairchild used this approach in their popular Micrologic line of DTL integrated circuits in the 1960s.<span><a href=\"https:\/\/pappp.net\/#fn:micrologic\" rel=\"noopener noreferrer\">9<\/a><\/span>\nThe second solution (used in IBM's <a href=\"https:\/\/static.righto.com\/sms\/DEH.html\" rel=\"noopener noreferrer\">SDTDL<\/a> circuits) is to shift the voltage levels by using additional resistors.<\/p>\n<p>The 1401's gates, instead, uses a surprising solution that avoided extra components.\nIn the gate above, the output voltage levels are raised up compared to the input.\nBut a similar gate with PNP transistors instead of NPN transistors will have the opposite property: the output levels will be lowered.\nSo IBM's solution was to alternate gates built with NPN transistors with gates built with PNP transistors.\nThe first gate raises the voltage level up, and the second gate lowers it back down.\nYou have twice as many types of gates, and it's more complex to design, but you avoid the expense of additional components.<\/p>\n<p>The photo below shows the PNP-based NAND gate card.\nIt is almost identical to the previous NPN card, except the transistors are PNP instead of NPN.\nThe other difference is that it is powered with -12V and 0V instead of -6V and 6V.<span><a href=\"https:\/\/pappp.net\/#fn:cgww-schematic\" rel=\"noopener noreferrer\">6<\/a><\/span><\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/cgww.jpg\" rel=\"noopener noreferrer\"><img alt=\"The CGWW NAND card is built with PNP transistors.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/cgww-w500.jpg\" title=\"The CGWW NAND card is built with PNP transistors.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>The CGWW NAND card is built with PNP transistors.<\/div>\n<p>In more detail, for the NPN gate we first examined, the input switches around -6 volts, and the output is about -6 volts or 6 volts.\nIn the corresponding PNP gate, the input switches around 0 volts, and the output is -12 volts or 0 volts.\nIBM called the -6V\/6V levels type \"T\" and the 0V\/12V levels type \"U\", so an NPN gate has a U input and a T output, while a PNP\ngate has a T input and a U output.<span><a href=\"https:\/\/pappp.net\/#fn:voltages\" rel=\"noopener noreferrer\">7<\/a><\/span>\nBy alternating NPN gates and PNP gates, you have T outputs going to T inputs and U outputs going to U inputs, and everything works.<span><a href=\"https:\/\/pappp.net\/#fn:debugging\" rel=\"noopener noreferrer\">8<\/a><\/span><\/p>\n<p>The diagram below shows part of the logic diagram from the 1401's <a href=\"https:\/\/www.righto.com\/2015\/10\/qui-binary-arithmetic-how-1960s-ibm.html?m=0\" rel=\"noopener noreferrer\">adder<\/a>, heavily simplified.\nTwo type U signals go into the first CHWW gate, which outputs a T signal. The <a href=\"http:\/\/static.righto.com\/sms\/4JMX.html\" rel=\"noopener noreferrer\">4JMX<\/a> gate\nis a PNP NAND gate that takes T inputs and outputs a U.\nThe <a href=\"http:\/\/static.righto.com\/sms\/CRZV.html\" rel=\"noopener noreferrer\">CRZV<\/a> is an NPN buffer that converts U to T.\nFinally, <a href=\"http:\/\/static.righto.com\/sms\/CNWT.html\" rel=\"noopener noreferrer\">CNWT<\/a> is an NPN driver that amplifies a T signal, in this case a binary carry-out signal.\nNote how the signals alternate between T and U (except for the last special driver).<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/ald.jpg\" rel=\"noopener noreferrer\"><img alt=\"Simplified excerpt from an IBM ALD logic diagram, page 34.32.16.2.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/ald-w550.jpg\" title=\"Simplified excerpt from an IBM ALD logic diagram, page 34.32.16.2.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>Simplified excerpt from an IBM <a href=\"http:\/\/ibm-1401.info\/ALDs-Australia\/3_7-1401-40-28588-2151_788-34-35.pdf\" rel=\"noopener noreferrer\">ALD logic diagram<\/a>, page 34.32.16.2.<\/div>\n<h2>Wired-OR<\/h2>\n<p>There's one more interesting trick with these logic gates: wired-OR.\nThe idea is that you can wire the outputs of several NAND gates together. If any gate outputs a logical 0, that gate will pull the output low.\nIf all gates output a logical 1, the output will be pulled high by the pull-up resistor.\nThe resulting circuit implements an AND-OR-Invert gate.\nThe diagram below illustrates how the NAND gates are wired together and how the circuit behaves logically.\nWired-OR circuits are widely used in the 1401 because you get the OR gate \"for free\", minimizing circuitry.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/aoi.jpg\" rel=\"noopener noreferrer\"><img alt=\"An AND-OR-Invert gate. This shows two NAND gates but more can be connected.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/aoi-w400.jpg\" title=\"An AND-OR-Invert gate. This shows two NAND gates but more can be connected.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>An AND-OR-Invert gate. This shows two NAND gates but more can be connected.<\/div>\n<p>There's one minor issue with wired-OR: if you wire standard NAND gates together, you end up with multiple pull-up resistors in\nparallel, which will affect the gate behavior.\nThe solution is to use gates without pull-up resistors, except for one gate that has the pull-up resistor.\nFor example, the <a href=\"http:\/\/static.righto.com\/sms\/4JMX.html\" rel=\"noopener noreferrer\">4JMX<\/a> card has the pull-up resistor (called a \"collector load\"),\nwhile the <a href=\"http:\/\/static.righto.com\/sms\/3JMX.html\" rel=\"noopener noreferrer\">3JMX<\/a> card lacks it.\nThus, a wired-OR could use one 4JMX card and the rest would be 3JMX.\n(This is one reason why there are so many different types of SMS cards.)<\/p>\n<p>Since each card only implements a small amount of logic, the IBM 1401 computer requires thousands of cards. The photo below shows how they are mounted inside the computer.\nI won't go into more detail here about how SMS cards are combined to create functional units,\nbut I've written about the circuitry in the <a href=\"https:\/\/www.righto.com\/2015\/10\/qui-binary-arithmetic-how-1960s-ibm.html\" rel=\"noopener noreferrer\">1401's adder<\/a> if you want to learn more.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate_with_cards.jpg\" rel=\"noopener noreferrer\"><img alt=\"SMS cards installed in the IBM 1401 computer. The fan at the left keeps the cards cool.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/gate_with_cards-w550.jpg\" title=\"SMS cards installed in the IBM 1401 computer. The fan at the left keeps the cards cool.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>SMS cards installed in the IBM 1401 computer. The fan at the left keeps the cards cool.<\/div>\n<h2>The transistors<\/h2>\n<p>These gates use bipolar NPN and PNP transistors, types of transistors that are still used today.\nBut the germanium\n<a href=\"https:\/\/en.wikipedia.org\/wiki\/Alloy-junction_transistor\" rel=\"noopener noreferrer\">alloy-junction<\/a> transistors\nwere completely different from modern silicon <a href=\"https:\/\/en.wikipedia.org\/wiki\/Diffusion_transistor#Planar_transistor\" rel=\"noopener noreferrer\">planar transistors<\/a>.\nThe photo below shows the construction of an NPN alloy transistor,\nIt consists of a P-type germanium crystal base with tin\/antimony beads fused on either side to form the emitter and collector.\nThe regions of germanium-antimony alloy form the \"N\" regions. The resulting N-P-N layers form the NPN transistor.\n(A PNP transistor is formed similarly, using indium for the alloy.)<span><a href=\"https:\/\/pappp.net\/#fn:periodic\" rel=\"noopener noreferrer\">10<\/a><\/span>\nIn the photo, the vertical metal plate is the base contact with the tiny germanium disk in the circular hole. Copper wires are connected to the indium beads on either side of the germanium disk.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/IBM083.jpg\" rel=\"noopener noreferrer\"><img alt=\"Inside a germanium alloy-junction transistor used in the IBM 1401 computer. This is an IBM type 083\nNPN transistor. Photo from\n  IBM 1401 restoration team\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/IBM083-w400.jpg\" title=\"Inside a germanium alloy-junction transistor used in the IBM 1401 computer. This is an IBM type 083\nNPN transistor. Photo from\n  IBM 1401 restoration team\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>Inside a germanium alloy-junction transistor used in the IBM 1401 computer. This is an IBM <a href=\"http:\/\/www.radiomuseum.org\/tubes\/tube_ti-083.html\" rel=\"noopener noreferrer\">type 083<\/a>\nNPN transistor. Photo from\n  <a href=\"http:\/\/ibm-1401.info\/GermaniumAlloy.html\" rel=\"noopener noreferrer\">IBM 1401 restoration team<\/a><\/div>\n<p>The 1950s were a time of rapid change in transistor technology.\nThe transistor was invented at Bell Labs in 1947.\nGeneral Electric invented the alloy junction transistor (used in the 1401) in 1950.\nIn 1953, the <a href=\"https:\/\/en.wikipedia.org\/wiki\/Drift-field_transistor\" rel=\"noopener noreferrer\">drift transistor<\/a> was created, faster because of its doping gradient.\nIBM used drift transistors in the Saturated Drift Transistor Diode Logic (SDTDL) family.\nThe first silicon transistors were introduced in 1954.\nThe wafer-based mesa transistor was invented in 1958, followed by the \n<!--\nBell Labs invented the mesa transistor in 1958 and Fairchild manufactured them in large quantities.\nMesa transistors were fabricated on a semiconductor wafer, etched into a raised mesa shape, and cut apart.\n-->\nmodern planar transistor in 1959.\nThus, transistors were undergoing radical changes in the 1950s and\nIBM introduced new logic families to take advantage of these new transistor types.<\/p>\n<!--\n1954: diffusion https:\/\/www.computerhistory.org\/siliconengine\/diffusion-process-developed-for-transistors\/\n\nIBM transistor history: http:\/\/ibm-1401.info\/TransistorMuseumIBM-GermaniumComputerTransistorHistoryDraftFeb2015-2.pdf\n\nHistory of Semiconductor Engineering p57 \nAlloy Junction transistor: Germanium wafer, developed at GE in 1950. Antimony soldered to P germanium to create N-type.\n(Antimony has one more valence electron than Si \/ Ge.)\nIndium has one less valence electron, so creates P-type.\np60 \nMesa, Bell Labes, Fairchild around 1958. Created on a wafer.  p110 \nTransistor forms a raised \"mesa\" above the collector, with the base-collector junction exposed.\n\nPlanar transistor Hoerni 1959: similar to modern ICs. Mass produced. Protected by oxide.\n-->\n\n<h2>Conclusion<\/h2>\n<p>Diode-transistor logic was a key part of IBM's early computers such as the IBM 1401.\nIn 1964, IBM introduced the groundbreaking System\/360 line of mainframes.\nThese computers still used diode-transistor logic, but instead of SMS cards with discrete components, the logic was encapsulated in small SLT modules (below)\nthat contained tiny silicon transistors and diodes.\nAn SLT module was roughly equivalent to an SMS card but just half an inch on a side and almost 100 times as reliable. <!-- Pugh p112 -->\nThe density, low cost, and reliability of SLT modules were important to the success of the System\/360 line.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/logic-board.jpg\" rel=\"noopener noreferrer\"><img alt=\"A board with 24 SLT modules on it, probably from the System\/360. The 361453 modules implement AND-OR-Invert.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/logic-board-w300.jpg\" title=\"A board with 24 SLT modules on it, probably from the System\/360. The 361453 modules implement AND-OR-Invert.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>A board with 24 SLT modules on it, probably from the System\/360. The <a href=\"https:\/\/ibm-slt-reference.fandom.com\/wiki\/361453\" rel=\"noopener noreferrer\">361453<\/a> modules implement AND-OR-Invert.<\/div>\n<p>In the 1960s, diode-transistor logic integrated circuits were introduced.\nBut DTL was soon eclipsed by the <a href=\"https:\/\/www.computerhistory.org\/siliconengine\/standard-logic-ic-families-introduced\/\" rel=\"noopener noreferrer\">rise of TTL<\/a> (transistor-transistor logic) in the late 1960s.\nIn the 1970s, integrated circuits with MOS transistor logic became common, especially for microprocessors.\nCMOS logic took over in the 1980s and it's still the most popular logic family.\nThanks to Moore's Law,\ntechnology has progressed from the IBM 1401 era with a few transistors on a board to modern microprocessors with billions of transistors on a chip.<\/p>\n<p>The <a href=\"https:\/\/computerhistory.org\/visit\/\" rel=\"noopener noreferrer\">Computer History Museum<\/a> in Mountain View, CA has two working 1401 computers, so stop by for\na demo (once the pandemic is over).\nThanks to <a href=\"https:\/\/news.ycombinator.com\/item?id=26238355\" rel=\"noopener noreferrer\">bogomipz<\/a> for suggesting this topic.\nThanks to Randall Neff and Henk Stegeman for SMS card photos.\nI announce my latest blog posts on Twitter, so follow me <a href=\"https:\/\/twitter.com\/kenshirriff\" rel=\"noopener noreferrer\">@kenshirriff<\/a>. I also have an <a href=\"http:\/\/www.righto.com\/feeds\/posts\/default\" rel=\"noopener noreferrer\">RSS feed<\/a>.<\/p>\n<h2>Notes and references<\/h2>\n<div>\n<ol><li>\n<p>IBM used a dizzying assortment of logic families in that era.\nEven the 1401 used multiple families (mostly the CTDL discussed above but also current-mode and STDTL in the TAU tape controller, and occasional SDTRL).<\/p>\n<p>The table below from 1963 summarizes IBM's numerous logic families.\nCTRL (Complemented Transistor Resistor Logic) used alloy-junction transistors. It was slow, operating below\n200 kilohertz.\nCTDL (Complemented Transistor Diode Logic) also used alloy-junction transistors but operated up to 250 kilohertz.\n(The Complemented families alternate NPN and PNP circuits.)\nCurrent mode (similar to emitter-coupled logic) was much faster as transistors weren't saturated and the voltage swings were small\n(&plusmn;.4V). It operated at 1 megahertz with alloy-junction transistors, and 7 megahertz with diffused junction transistors. <\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/logic-families.jpg\" rel=\"noopener noreferrer\"><img alt=\"IBM's logic families from DDTL Component Circuits, 1963, p5.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/logic-families-w750.jpg\" title=\"IBM's logic families from DDTL Component Circuits, 1963, p5.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>IBM's logic families from <a href=\"http:\/\/www.bitsavers.org\/pdf\/ibm\/logic\/223-2618_DDTL_Component_Circuits_CEMI_Sep1963.pdf\" rel=\"noopener noreferrer\">DDTL Component Circuits<\/a>, 1963, p5.<\/div>\n<p>For more discussion, see\n<a href=\"http:\/\/ibm-1401.info\/Form223-6889-TransistorComponentCircuits.pdf\" rel=\"noopener noreferrer\">Transistor Component Circuits<\/a> and\n<a href=\"http:\/\/ibm-1401.info\/LogicFamilies1401-CClaunch.html\" rel=\"noopener noreferrer\">Logic families in the 1401<\/a>.\nThere's an interesting discussion in Wikipedia's <a href=\"https:\/\/en.wikipedia.org\/wiki\/Talk:Diode%E2%80%93transistor_logic#Two_Worlds\" rel=\"noopener noreferrer\">DTL talk page<\/a> by <a href=\"https:\/\/en.wikipedia.org\/wiki\/User:Thingmaker\" rel=\"noopener noreferrer\">William Crouse<\/a>, who designed many of the SDTDL circuits at IBM.&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:families\" title=\"Jump back to footnote 1 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>IBM also offered SMS cards as components for other companies to use in products.\nThe announcement below is from Datamation in 1966.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/sms-ad.jpg\" rel=\"noopener noreferrer\"><img alt=\"A product announcement for SMS cards from Datamation, 1966.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/sms-ad-w250.jpg\" title=\"A product announcement for SMS cards from Datamation, 1966.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>A product announcement for SMS cards from <a href=\"http:\/\/bitsavers.org\/magazines\/Datamation\/196607.pdf\" rel=\"noopener noreferrer\">Datamation<\/a>, 1966.<\/div>\n<p><!-- -->&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:ad\" title=\"Jump back to footnote 2 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>The idea behind Standard Module System cards was that IBM could manufacture a small number of standardized cards and build systems from them.\nUnfortunately, standardization worked better in theory than in practice and IBM ended up with <a href=\"http:\/\/static.righto.com\/sms\/index.html\" rel=\"noopener noreferrer\">thousands of different card types<\/a>.\nAs well as logic functions, SMS cards had a wide variety of roles including oscillators, printer drivers, core memory arrays, sense amplifiers,\npower supply regulation, and tape preamps.&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:standardization\" title=\"Jump back to footnote 3 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>Many vacuum tube computers used semiconductor diodes as a key part of their logic gates.\nI think that diodes don't get the recognition they deserve; computer generations are divided into tube versus transistor, without\nrecognizing the gradual introduction of semiconductors in the form of diodes.&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:diodes\" title=\"Jump back to footnote 4 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>Note the inductor connected to the output of the gate. The inductor increases the speed when pulling the output high.\nThe problem is that the output is pulled high through a resistor, so any capacitance on the output wire results in a delay as it is charged.\nThe inductor counteracts this capacitance. To handwave, once the resistor starts pulling the signal up, the inductor keeps the current\nflowing.\nMore discussion of the peaking coil <a href=\"http:\/\/ibm-1401.info\/PeakingCoil.html\" rel=\"noopener noreferrer\">here<\/a>.&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:inductor\" title=\"Jump back to footnote 5 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>Here's the schematic of the PNP-based NAND gate used in the CGWW card.\nIt is similar to the NPN-based gate, except the circuit is flipped and runs off -12 volts.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/cgww-schematic.jpg\" rel=\"noopener noreferrer\"><img alt=\"Schematic of a CGWW logic circuit. From Standard Modular System Component Circuits, p42.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/cgww-schematic-w400.jpg\" title=\"Schematic of a CGWW logic circuit. From Standard Modular System Component Circuits, p42.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>Schematic of a CGWW logic circuit. From <a href=\"http:\/\/ibm-1401.info\/IBM-StandardModularSystem-Neff7.pdf\" rel=\"noopener noreferrer\">Standard Modular System Component Circuits<\/a>, p42.<\/div>\n<p><!-- -->&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:cgww-schematic\" title=\"Jump back to footnote 6 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>IBM used a remarkable number of different voltage levels for its logic families.\nThe CTDL gates described in this article used the \"T\" and \"U\" levels. The table below gives the others.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/line-levels.jpg\" rel=\"noopener noreferrer\"><img alt=\"IBM's logic families used numerous incompatible voltage levels. From the IBM 1401 Pocket Reference.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/line-levels-w500.jpg\" title=\"IBM's logic families used numerous incompatible voltage levels. From the IBM 1401 Pocket Reference.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>IBM's logic families used numerous incompatible voltage levels. From the <a href=\"http:\/\/ibm-1401.info\/1401-CE_Pocket-Ref-Man-56-389-.pdf\" rel=\"noopener noreferrer\">IBM 1401 Pocket Reference<\/a>.<\/div>\n<p><!-- -->&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:voltages\" title=\"Jump back to footnote 7 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>I should point out that having two sets of voltage levels makes debugging the 1401 system very confusing.\nIf you measure -3 volts, for instance, this is a logical low for a T signal and a logical high for a U signal.\nThe wired-OR gates also make debugging inconvenient. If the output is low, you can't easily tell which NAND gate is pulling the output low, and these\nNAND gates may be on different cards with many different inputs.&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:debugging\" title=\"Jump back to footnote 8 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>The schematic below shows the implementation of a NAND gate in the Fairchild Micrologic family of integrated circuits.\nThis circuit uses an additional transistor and diode to shift the voltage levels.\nThis was practical in an integrated circuit because the additional components had minimal cost.\nThis circuit wouldn't have worked well in the IBM 1401 because the 1401's germanium components provided a much smaller \nvoltage shift than the silicon components in the Fairchild IC.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/fairchild-dtl.jpg\" rel=\"noopener noreferrer\"><img alt=\"Schematic of a Fairchild Micrologic DTL gate from the databook.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/fairchild-dtl-w400.jpg\" title=\"Schematic of a Fairchild Micrologic DTL gate from the databook.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>Schematic of a Fairchild Micrologic DTL gate from the <a href=\"https:\/\/archive.org\/details\/bitsavers_fairchilddldch15_20989397\/page\/n162\/mode\/1up\" rel=\"noopener noreferrer\">databook<\/a>.<\/div>\n<p><!-- -->&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:micrologic\" title=\"Jump back to footnote 9 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<li>\n<p>The periodic table shows why elements such as indium were used in the alloy transistors.  Note that the semiconductor germanium is in the same column as silicon, which later replaced it.\nIndium and gallium are in the column to the left, so they have one fewer valence electron. Thus, adding them to the semiconductor makes it more positive (P-type), since electrons are negative.\nAntimony is to the right; its additional valence electron makes the semiconductor negative (N-type).\nTin, in the same column as germanium, was used in the alloy but has no effect on the semiconductor properties.<\/p>\n<p><a href=\"https:\/\/static.righto.com\/images\/ibm-logic\/periodic.jpg\" rel=\"noopener noreferrer\"><img alt=\"This excerpt of the periodic table shows key elements in transistor construction. Source: NCBI.\" src=\"https:\/\/static.righto.com\/images\/ibm-logic\/periodic-w400.jpg\" title=\"This excerpt of the periodic table shows key elements in transistor construction. Source: NCBI.\" referrerpolicy=\"no-referrer\" loading=\"lazy\"\/><\/a><\/p><div>This excerpt of the periodic table shows key elements in transistor construction. Source: <a href=\"https:\/\/pubchem.ncbi.nlm.nih.gov\/periodic-table\" rel=\"noopener noreferrer\">NCBI<\/a>.<\/div>\n<p><!-- -->&nbsp;<a href=\"https:\/\/pappp.net\/#fnref:periodic\" title=\"Jump back to footnote 10 in the text\" rel=\"noopener noreferrer\">&#8617;<\/a><\/p>\n<\/li>\n<\/ol><\/div>","protected":false},"excerpt":{"rendered":"<p>.hilite {cursor:zoom-in}<br \/>\n  a:link img.hilite, a:visited img.hilite { color: #fff;}<br \/>\nHow did compu&#8230;<\/p>\n<p> <a href=\"https:\/\/pappp.net\/?p=35708\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[226],"tags":[],"class_list":["post-35708","post","type-post","status-publish","format-standard","hentry","category-news-2"],"_links":{"self":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts\/35708","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=35708"}],"version-history":[{"count":0,"href":"https:\/\/pappp.net\/index.php?rest_route=\/wp\/v2\/posts\/35708\/revisions"}],"wp:attachment":[{"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=35708"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=35708"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/pappp.net\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=35708"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}